[CentOS] Re: OT raid controller -- IT8212 = embedded core + 32KB SRAM

[Bryan J. Smith]

On Sun, 2005-06-19 at 23:17 -0400, Peter Arremann wrote:
> Hmmm - just a guess but the 32KB aren't cache, they are a buffer
> needed by the controller when writing data to different busses. 

I used the term "cache" because it's 0 wait state.  In reality, cache v.
buffer is really more of an OS concept.

I use "cache" for 0 wait state memory and "buffer" for high latency
memory when I talk I/O hardware.


-- 
Bryan J. Smith                                     b.j.smith at ieee.org 
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