[CentOS] Memtest86+ running time

m.roth at 5-cent.us m.roth at 5-cent.us
Tue Nov 16 14:58:14 UTC 2010


Keith Roberts wrote:
> On Fri, 12 Nov 2010, John R Pierce wrote:
>> From: John R Pierce <pierce at hogranch.com>
>> On 11/12/10 12:21 PM, Keith Roberts wrote:
>>>  On Fri, 12 Nov 2010, John R Pierce wrote:
>>> >  that sounds quite likely. some of those modules have two banks on
>>> > the single module, and I seriously doubt a system is going to like a
>>> > single bank and a dual bank module in a dual channel environment.
>>> >
>>> >  I got in the habit a long time ago of *always* using
>>> >  matched memory modules.
>>>  I've learnt my lesson now John.
>>>
>>>  Well at least I won't mix hi and lo density modules again.
>>>
>>>  Here's the link for my Asrock m/b:
>>>
>>>  http://www.crucial.com/uk/store/listparts.aspx?model=K7S8XE%20R3.0
>>>
>>>  It does not support dual channel memory.
>>
>> no, but look at these constraints on the memory vs cpu FSB speeds
>> http://www.asrock.com/mb/overview.asp?Model=K7S8XE
<snip>
> I wanted to install the maximum amount of memory, so I'm
> using a 1.3GHz Athlon, with a 133 FSB speed IIRC.
>
> I think the problem is mixing the Hi and Lo density modules.
<snip>
May I recommend looking at the docs that tell you what order the DIMMs
need to be put into the board in? If you've got four slots, for example,
I'll bet that it's 1 and 2, then 3 and 4, or maybe 1 and 3, then 2 and 4.
I'd feel safe putting identical DIMMs in each pair, so that the first two
are the bigger ones, and the second pair are smaller. A number of our
servers *require* pairs, so if I start getting a lot of ECC errors, they
send me a pair to replace them.

          mark




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