This patch also help avoid an eror when built as module, so enable X-Gene HWMon driver as module as well. Signed-off-by: Duc Dang <dhdang at apm.com> --- .../1020-hwmon-xgene-access-mailbox-as-RAM.patch | 124 +++++++++++++++++++++ SOURCES/config-arm64 | 2 +- SPECS/kernel-aarch64.spec | 3 + 3 files changed, 128 insertions(+), 1 deletion(-) create mode 100644 SOURCES/1020-hwmon-xgene-access-mailbox-as-RAM.patch diff --git a/SOURCES/1020-hwmon-xgene-access-mailbox-as-RAM.patch b/SOURCES/1020-hwmon-xgene-access-mailbox-as-RAM.patch new file mode 100644 index 0000000..3047a06 --- /dev/null +++ b/SOURCES/1020-hwmon-xgene-access-mailbox-as-RAM.patch @@ -0,0 +1,124 @@ +From c7cefce03e691270c0e5e117248e14661e9c9cad Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann <arnd at arndb.de> +Date: Fri, 9 Sep 2016 22:10:45 +0200 +Subject: [PATCH] hwmon: (xgene) access mailbox as RAM + +The newly added hwmon driver fails to build in an allmodconfig +kernel: + + ERROR: "memblock_is_memory" [drivers/hwmon/xgene-hwmon.ko] undefined! + +According to comments in the code, the mailbox is a shared memory region, +not a set of MMIO registers, so we should use memremap() for mapping it +instead of ioremap or acpi_os_ioremap, and pointer dereferences instead +of readl/writel. + +The driver already uses plain kernel pointers, so it's a bit unusual +to work with functions that operate on __iomem pointers, and this +fixes that part too. + +I'm using READ_ONCE/WRITE_ONCE here to keep the existing behavior +regarding the ordering of the accesses from the CPU, but note that +there are no barriers (also unchanged from before). + +I'm also keeping the endianness behavior, though I'm unsure whether +the message data was supposed to be in LE32 format in the first +place, it's possible this was meant to be interpreted as a byte +stream instead. + +Signed-off-by: Arnd Bergmann <arnd at arndb.de> +Acked-by: Hoan Tran <hotran at apm.com> +Tested-by: Hoan Tran <hotran at apm.com> +Signed-off-by: Guenter Roeck <linux at roeck-us.net> +--- + drivers/hwmon/xgene-hwmon.c | 29 +++++++++++++++-------------- + 1 file changed, 15 insertions(+), 14 deletions(-) + +diff --git a/drivers/hwmon/xgene-hwmon.c b/drivers/hwmon/xgene-hwmon.c +index aa44579..9c0dbb8 100644 +--- a/drivers/hwmon/xgene-hwmon.c ++++ b/drivers/hwmon/xgene-hwmon.c +@@ -27,6 +27,7 @@ + #include <linux/dma-mapping.h> + #include <linux/hwmon.h> + #include <linux/hwmon-sysfs.h> ++#include <linux/io.h> + #include <linux/interrupt.h> + #include <linux/kfifo.h> + #include <linux/mailbox_controller.h> +@@ -34,7 +35,7 @@ + #include <linux/module.h> + #include <linux/of.h> + #include <linux/platform_device.h> +-#include <acpi/acpi_io.h> ++ + #include <acpi/pcc.h> + + /* SLIMpro message defines */ +@@ -126,10 +127,10 @@ static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) + { + u16 ret, val; + +- val = readw_relaxed(addr); ++ val = le16_to_cpu(READ_ONCE(*addr)); + ret = val & mask; + val &= ~mask; +- writew_relaxed(val, addr); ++ WRITE_ONCE(*addr, cpu_to_le16(val)); + + return ret; + } +@@ -137,7 +138,7 @@ static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask) + static int xgene_hwmon_pcc_rd(struct xgene_hwmon_dev *ctx, u32 *msg) + { + struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr; +- void *ptr = generic_comm_base + 1; ++ u32 *ptr = (void *)(generic_comm_base + 1); + int rc, i; + u16 val; + +@@ -146,21 +147,21 @@ static int xgene_hwmon_pcc_rd(struct xgene_hwmon_dev *ctx, u32 *msg) + ctx->resp_pending = true; + + /* Write signature for subspace */ +- writel_relaxed(PCC_SIGNATURE_MASK | ctx->mbox_idx, +- &generic_comm_base->signature); ++ WRITE_ONCE(generic_comm_base->signature, ++ cpu_to_le32(PCC_SIGNATURE_MASK | ctx->mbox_idx)); + + /* Write to the shared command region */ +- writew_relaxed(MSG_TYPE(msg[0]) | PCCC_GENERATE_DB_INT, +- &generic_comm_base->command); ++ WRITE_ONCE(generic_comm_base->command, ++ cpu_to_le16(MSG_TYPE(msg[0]) | PCCC_GENERATE_DB_INT)); + + /* Flip CMD COMPLETE bit */ +- val = readw_relaxed(&generic_comm_base->status); ++ val = le16_to_cpu(READ_ONCE(generic_comm_base->status)); + val &= ~PCCS_CMD_COMPLETE; +- writew_relaxed(val, &generic_comm_base->status); ++ WRITE_ONCE(generic_comm_base->status, cpu_to_le16(val)); + + /* Copy the message to the PCC comm space */ + for (i = 0; i < sizeof(struct slimpro_resp_msg) / 4; i++) +- writel_relaxed(msg[i], ptr + i * 4); ++ WRITE_ONCE(ptr[i], cpu_to_le32(msg[i])); + + /* Ring the doorbell */ + rc = mbox_send_message(ctx->mbox_chan, msg); +@@ -689,9 +690,9 @@ static int xgene_hwmon_probe(struct platform_device *pdev) + */ + ctx->comm_base_addr = cppc_ss->base_address; + if (ctx->comm_base_addr) { +- ctx->pcc_comm_addr = +- acpi_os_ioremap(ctx->comm_base_addr, +- cppc_ss->length); ++ ctx->pcc_comm_addr = memremap(ctx->comm_base_addr, ++ cppc_ss->length, ++ MEMREMAP_WB); + } else { + dev_err(&pdev->dev, "Failed to get PCC comm region\n"); + rc = -ENODEV; +-- +1.8.3.1 + diff --git a/SOURCES/config-arm64 b/SOURCES/config-arm64 index f9e45e2..167e9e6 100644 --- a/SOURCES/config-arm64 +++ b/SOURCES/config-arm64 @@ -168,7 +168,7 @@ CONFIG_PHY_XGENE=y CONFIG_SATA_XGENE=y CONFIG_XGENE_QMTM=y CONFIG_NET_XGENE=y -CONFIG_SENSORS_XGENE=y +CONFIG_SENSORS_XGENE=m CONFIG_XGENE_PMU=y # Cavium Thunder diff --git a/SPECS/kernel-aarch64.spec b/SPECS/kernel-aarch64.spec index de899ca..88a35a6 100644 --- a/SPECS/kernel-aarch64.spec +++ b/SPECS/kernel-aarch64.spec @@ -344,6 +344,7 @@ Patch1016: 1016-drivers-net-xgene-fix-Disable-coalescing-on-v1-hardw.patch Patch1017: 1017-drivers-net-xgene-fix-Coalescing-values-for-v2-hardw.patch Patch1018: 1018-ACPI-PCI-fix-GIC-irq-model-default-PCI-IRQ-polarity.patch Patch1019: 1019-i2c-designware-Implement-support-for-SMBus-block-rea.patch +Patch1020: 1020-hwmon-xgene-access-mailbox-as-RAM.patch # QDF2400 Patches Patch4000: 4000-arm64-Define-Qualcomm-Technologies-ARMv8-CPU.patch @@ -698,6 +699,7 @@ git am %{PATCH1016} git am %{PATCH1017} git am %{PATCH1018} git am %{PATCH1019} +git am %{PATCH1020} # Apply QDF2400 patches git am %{PATCH4000} @@ -1477,6 +1479,7 @@ fi %changelog * Thu Nov 10 2016 Duc Dang <dhdang at apm.com> [4.5.0-17.el7] +- Integrate upstream fix to make X-Gene HWmon access mailbox as RAM and avoid eror when built as module - Integrated posted patch to support SMBus block read/write for Designware I2C - Integrate upstream fix for GIC default PCI IRQ polarity - Integrate upstream updates for X-Gene Enet driver -- 1.8.3.1