[CentOS] [OT] Memory Models and Multi/Virtual-Cores -- WAS: 4.0 -> 4.1 update failing

Sat Jun 25 01:17:47 UTC 2005
Bryan J. Smith <b.j.smith at ieee.org>

On Fri, 2005-06-24 at 20:14 -0500, Bryan J. Smith wrote:
> In a nutshell, Intel PAE36 processors on even AGTL+ are _incapable_ of
> the combination of both _physical_ and _logical_ addressing to do
> anything but paging above 4GiB.  That's my point.

BTW, there are also issues with Intel's EM64T (IA-32e) processors in
PAE52 (Long) mode with "windowing" PAE36 processes on an AGTL+ platform.

Things solved _long_ago_ on the original Athlon, and more formally
supported in AMD64 (x86-64), including being enabled on the original
Athlon MP with that BIOS-based mode change.

-- 
Bryan J. Smith                                     b.j.smith at ieee.org 
--------------------------------------------------------------------- 
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to be anything but richer than you.  Any tax rate that penalizes them
will also penalize you similarly (to those below you, and then below
them).  Linear algebra, let alone differential calculus or even ele-
mentary concepts of limits, is mutually exclusive with US journalism.
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