Lamar Owen <lowen at pari.edu> wrote: > Since the Xeon will likely perform worse than an equivalent > speed Opteron, this is a valid comparison, and it has > nothing to do with interconnect. ??? What world do you live in ??? When it comes to a server, interconnect is everything. Especially the more I/O you do. > Why not? Yes, they are different; why don't you stop > assuming that people who use Opeteron and Xeon in the > same sentence or paragraph are not as clueful as > yourself? I am fully aware of the differences They are _completely_ different. > and of the similarities in the Hammer versus Xeon > architecture; GTL+ and NUMA/HyperTransport are _completely_ different. > yet, since I have no Opterons here Yes, that was pretty obvious. > (for servers, we buy Dell (for reasons other than raw > performance), and Dell doesn't yet do Opteron), a simple > comparison to a Xeon is the best I can do. And I said don't do it. You can't. They are _not_ comparable at all. There is far more similarity between SPARC and Xeon than Opteron when it comes to how the interconnect works, although UPA/SPARC is much closer to Opteron than Xeon. > I was very pleased at the donated E6500's performance. Yes, because you compared it to Xeon. But you were doing it in the context of what the performance versus Opteron would be. It's wholly inapplicable. > There are other reasons, not the least of which is that > SPARC is difficult to get increased clock speeds (hardware > contexts, IIRC). Don't even look at clock speeds. They are not comparable between _any_ platforms, much less have _nothing_ to do with most server operations. Interconnect is everything when it comes to the ability to move data. > Hypertransport and UPA share many architectural > similarities, though. Actually, UPA and EV6 share many architecture similarities. HyperTransport is actually very generic, and a radical change. Furthermore, it really matters what you are tunneling over HyperTransport. Some HyperTransport implementations -- e.g., IBM PowerPC 9xx -- tunnel everything over it, including the fact that memory is UMA and not local to the CPU. This is not much different than traditional UPA, EV6 and other "crossbar" system interconnects. Other HyperTransport implementations -- e.g., AMD Opteron -- use HyperTransport via NUMA, and their performance varies wildly on the ability of the OS to handle processor affinity for programs and I/O. It is very, very, _very_ different from the standpoint of system management, even if the firmware/logic allows transparent use of older, non-affinity or only "affinity hinting" OSes to utilize it. -- Bryan J. Smith | Sent from Yahoo Mail mailto:b.j.smith at ieee.org | (please excuse any http://thebs413.blogspot.com/ | missing headers)