> No, actually, it's a gcc bug. The C3 doesn't support the CMOV instruction, > which is ok according to Intel documentation, and software should check > whether this instruction is available. gcc implicitly expects every 686 to > have this instruction. > To add up to the confusion, on later VIA CPUs (those with a C5P core and > later), you'll actually want to use 686 to initialize the SSE pipeline, > which is necessary to make use of the xcrypt instructions (which will > otherwise be invalid opcodes). Hmm, that does explain it pretty well. I think I'll maintain my original position though and blame via, simply because I had a run of bad experiences with their chipsets early on in my computing career. I don't care what you and your 'facts' say :-P It sits better with my unfounded beliefs that via screwed up as opposed to a gcc bug. :-) -- During times of universal deceit, telling the truth becomes a revolutionary act. George Orwell