I am running irqbalance with default configuration on an Atom 330 machine. This CPU has 2 physical cores + 2 SMT (aka Hyperthreading) cores.
As shown below the interrupt for the eth0 device is always on CPUs 0 and 1, with CPUs 2 and 3 left idle. But why?
Maybe irqbalance prefers physical cores? My understanding, though, is that the even-numbered CPUs are the physical cores, with the odd-numbered one being the SMT cores. If this understanding is correct, it means that irqbalance is toggling between a single physical core and its SMT sibling.
Any thoughts on why irqbalance is not using all 4 CPUs to distribute the eth0 interrupts?
Thanks.
---------------------
# cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
0: 717 568 0 0 IO-APIC-edge timer
1: 0 2 0 0 IO-APIC-edge i8042
8: 26 33 0 0 IO-APIC-edge rtc0
9: 0 0 0 0 IO-APIC-fasteoi acpi
12: 1 3 0 0 IO-APIC-edge i8042
17: 11409 11661 0 0 IO-APIC-fasteoi ahci
18: 264 424 0 0 IO-APIC-fasteoi snd_hda_intel
20: 0 0 0 0 IO-APIC-fasteoi ohci_hcd:usb2
21: 0 0 0 0 IO-APIC-fasteoi ohci_hcd:usb3
22: 0 0 0 0 IO-APIC-fasteoi ehci_hcd:usb1
24: 686292451 685980205 0 0 PCI-MSI-edge eth0