On 05/14/2015 04:19 PM, Always Learning wrote: > > On Thu, 2015-05-14 at 13:51 -0700, John R Pierce wrote: >> On 5/14/2015 1:39 PM, Always Learning wrote: >>> Does this mean it may be possible to run basic version of C5, C6 and C7 >>> on Arm64* CPU systems ? Presumably this will include the Raspberry Pi ? > >> is the rasberry pi ARMv8 (arm64) ? I thought it was v7 (32bit only) > > ~~~~~~~~~~ > > Raspberry Pi 2 Model B is the second generation Raspberry Pi. > A 900MHz quad-core ARM Cortex-A7 CPU > 128-bit AMBA® 4 AXI bus interface. > > The Cortex-A7 processor builds on the energy-efficient 8-stage pipeline > of the Cortex-A5 processor. .... with 64-bit load-store path, 128-bit > AMBA 4 AXI buses and increased TLB size (256 entry, up from 128 > entry .... > > ARMv7-A > > The MPE extends the Cortex-A7 processor's FPU to provide a quad-MAC and > additional 64-bit and 128-bit register set supporting a rich set of SIMD > operations over 8, 16 and 32-bit integer and 32-bit Floating-Point data > quantities. > > ~~~~~~~~~~ > > Except for the above, can't find any specific mentioned of 32 or 64 bit > CPU. http://en.wikipedia.org/wiki/ARM_architecture#Cores ARMv7-A is 32 bit .. We are currently building for some of the listed ARMv8-A systems with our AArch64 architecture. -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: <http://lists.centos.org/pipermail/centos/attachments/20150514/b075fe87/attachment-0005.sig>