[CentOS] Re: OT raid controller -- IT8212 = embedded core + 32KB SRAM
Peter Arremann
loony at loonybin.orgMon Jun 20 06:03:19 UTC 2005
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On Monday 20 June 2005 01:10, Bryan J. Smith wrote: > On Sun, 2005-06-19 at 23:17 -0400, Peter Arremann wrote: > > Hmmm - just a guess but the 32KB aren't cache, they are a buffer > > needed by the controller when writing data to different busses. > > I used the term "cache" because it's 0 wait state. In reality, cache v. > buffer is really more of an OS concept. > > I use "cache" for 0 wait state memory and "buffer" for high latency > memory when I talk I/O hardware. Fair enough - I usually go by buffer as memory to work in (i.e. calculate checksums and so on) while cache is used to defer actions (like writing to disk) to a later point in time :-) Peter.
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