According dmidecode this cpu have:
L1 - 64KiB - not true in my opinion because (L1 Instruction cache: 32KB and
L1 Data cache: 32KB) per core - L1 should be 128KiB
L2 - 6Mib - true
dmidecode --type 4,7
# dmidecode 2.10
SMBIOS 2.4 present.
Handle 0x0004, DMI type 4, 35 bytes
Processor Information
Socket Designation: U10
Type: Central Processor
Family: Pentium M
Manufacturer: Intel(R)
ID: 76 06 01 00 FF FB EB BF
Signature: Type 0, Family 6, Model 23, Stepping 6
Flags:
FPU (Floating-point unit on-chip)
VME (Virtual mode extension)
DE (Debugging extension)
PSE (Page size extension)
TSC (Time stamp counter)
MSR (Model specific registers)
PAE (Physical address extension)
MCE (Machine check exception)
CX8 (CMPXCHG8 instruction supported)
APIC (On-chip APIC hardware supported)
SEP (Fast system call)
MTRR (Memory type range registers)
PGE (Page global enable)
MCA (Machine check architecture)
CMOV (Conditional move instruction supported)
PAT (Page attribute table)
PSE-36 (36-bit page size extension)
CLFSH (CLFLUSH instruction supported)
DS (Debug store)
ACPI (ACPI supported)
MMX (MMX technology supported)
FXSR (Fast floating-point save and restore)
SSE (Streaming SIMD extensions)
SSE2 (Streaming SIMD extensions 2)
SS (Self-snoop)
HTT (Hyper-threading technology)
TM (Thermal monitor supported)
PBE (Pending break enabled)
Version: Intel(R) Core(TM)2 Duo CPU T9300 @ 2.50GHz
Voltage: 1.1 V
External Clock: 200 MHz
Max Speed: 2500 MHz
Current Speed: 2500 MHz
Status: Populated, Enabled
Upgrade: None
L1 Cache Handle: 0x0005
L2 Cache Handle: 0x0006
L3 Cache Handle: Not Provided
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Handle 0x0005, DMI type 7, 19 bytes
Cache Information
Socket Designation: Internal L1 Cache
Configuration: Enabled, Not Socketed, Level 1
Operational Mode: Write Back
Location: Internal
Installed Size: 64 kB
Maximum Size: 64 kB
Supported SRAM Types:
Burst
Installed SRAM Type: Burst
Speed: Unknown
Error Correction Type: Unknown
System Type: Unified
Associativity: 4-way Set-associative
Handle 0x0006, DMI type 7, 19 bytes
Cache Information
Socket Designation: Internal L2 Cache
Configuration: Enabled, Not Socketed, Level 2
Operational Mode: Write Back
Location: External
Installed Size: 6144 kB
Maximum Size: 6144 kB
Supported SRAM Types:
Burst
Installed SRAM Type: Burst
Speed: Unknown
Error Correction Type: None
System Type: Unified
Associativity: 4-way Set-associative
On Mon, Jun 27, 2011 at 1:00 PM, William L. Maltby <CentOS4Bill at triad.rr.com
> wrote:
>
> On Mon, 2011-06-27 at 12:25 +0200, clibup clibup wrote:
> > Hi
> >
> > Could anybody explain me how to check how many L1/L2 cache my cpu
> > have.
> > I'm using CentOS 5.6
>
> On my workstation, type 4 is cpu, 7 is cache. W/no params list
> everything.
>
> # dmidecode --type 4,7
>
> >
> > <snip>
>
> Bill
>
> _______________________________________________
> CentOS mailing list
> CentOS at centos.org
> http://lists.centos.org/mailman/listinfo/centos
>
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