This series integrates already upstream or accepted patches that: + Enable interrupt support for X-Gene Standby GPIO + Enable kernel to support firmware update via fwupdate tool + Fix a lockdep warning when request PCC channel
Duc Dang (3): Add interrupt support for X-Gene Standby GPIO Add firmware update support with fwupdate tool Fix lockdep warning when request PCC channel in mailbox PCC driver
...Enable-X-Gene-standby-GPIO-as-interrupt-c.patch | 366 +++++++++++++++++++++ ...enirq-Export-IRQ-functions-for-module-use.patch | 110 +++++++ ...-drivers-to-reserve-boot-services-forever.patch | 112 +++++++ ...fi-esrt-add-missing-call-to-efi_esrt_init.patch | 48 +++ SOURCES/1025-efi-esrt-Don-t-preformat-name.patch | 46 +++ ...t-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch | 90 +++++ ...e-memremap-not-ioremap-to-access-ESRT-tab.patch | 52 +++ ...-Fix-lockdep-warning-when-request-PCC-cha.patch | 120 +++++++ SPECS/kernel-aarch64.spec | 23 +- 9 files changed, 966 insertions(+), 1 deletion(-) create mode 100644 SOURCES/1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch create mode 100644 SOURCES/1022-genirq-Export-IRQ-functions-for-module-use.patch create mode 100644 SOURCES/1023-efi-Allow-drivers-to-reserve-boot-services-forever.patch create mode 100644 SOURCES/1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch create mode 100644 SOURCES/1025-efi-esrt-Don-t-preformat-name.patch create mode 100644 SOURCES/1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch create mode 100644 SOURCES/1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch create mode 100644 SOURCES/1028-mailbox-PCC-Fix-lockdep-warning-when-request-PCC-cha.patch
Integrate upstream patches to add interrupt support for X-Gene Standby GPIO. This will help support for features that require GPIO pin to be configured as interrupt pin like power/reset button.
Signed-off-by: Duc Dang dhdang@apm.com --- ...Enable-X-Gene-standby-GPIO-as-interrupt-c.patch | 366 +++++++++++++++++++++ ...enirq-Export-IRQ-functions-for-module-use.patch | 110 +++++++ SPECS/kernel-aarch64.spec | 9 +- 3 files changed, 484 insertions(+), 1 deletion(-) create mode 100644 SOURCES/1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch create mode 100644 SOURCES/1022-genirq-Export-IRQ-functions-for-module-use.patch
diff --git a/SOURCES/1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch b/SOURCES/1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch new file mode 100644 index 0000000..08fd49b --- /dev/null +++ b/SOURCES/1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch @@ -0,0 +1,366 @@ +From c67c646945a8681c2d8bc06086394de3874ae9e1 Mon Sep 17 00:00:00 2001 +From: Quan Nguyen qnguyen@apm.com +Date: Wed, 17 Feb 2016 20:15:07 +0700 +Subject: [PATCH 1021/1027] gpio: xgene: Enable X-Gene standby GPIO as + interrupt controller + +Enable X-Gene standby GPIO controller as interrupt controller to provide +its own resources. This avoids ambiguity where GIC interrupt resource is +use as X-Gene standby GPIO interrupt resource in user driver. + +Signed-off-by: Y Vo yvo@apm.com +Signed-off-by: Quan Nguyen qnguyen@apm.com +Acked-by: Marc Zyngier marc.zyngier@arm.com +Signed-off-by: Linus Walleij linus.walleij@linaro.org +--- + drivers/gpio/gpio-xgene-sb.c | 265 +++++++++++++++++++++++++++++++++++++------ + 1 file changed, 233 insertions(+), 32 deletions(-) + +diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c +index 282004d..b993b86 100644 +--- a/drivers/gpio/gpio-xgene-sb.c ++++ b/drivers/gpio/gpio-xgene-sb.c +@@ -2,8 +2,9 @@ + * AppliedMicro X-Gene SoC GPIO-Standby Driver + * + * Copyright (c) 2014, Applied Micro Circuits Corporation +- * Author: Tin Huynh tnhuynh@apm.com. +- * Y Vo yvo@apm.com. ++ * Author: Tin Huynh tnhuynh@apm.com. ++ * Y Vo yvo@apm.com. ++ * Quan Nguyen qnguyen@apm.com. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the +@@ -28,9 +29,14 @@ + + #include "gpiolib.h" + +-#define XGENE_MAX_GPIO_DS 22 +-#define XGENE_MAX_GPIO_DS_IRQ 6 ++/* Common property names */ ++#define XGENE_NIRQ_PROPERTY "apm,nr-irqs" ++#define XGENE_NGPIO_PROPERTY "apm,nr-gpios" ++#define XGENE_IRQ_START_PROPERTY "apm,irq-start" + ++#define XGENE_DFLT_MAX_NGPIO 22 ++#define XGENE_DFLT_MAX_NIRQ 6 ++#define XGENE_DFLT_IRQ_START_PIN 8 + #define GPIO_MASK(x) (1U << ((x) % 32)) + + #define MPA_GPIO_INT_LVL 0x0290 +@@ -39,19 +45,32 @@ + #define MPA_GPIO_IN_ADDR 0x02a4 + #define MPA_GPIO_SEL_LO 0x0294 + ++#define GPIO_INT_LEVEL_H 0x000001 ++#define GPIO_INT_LEVEL_L 0x000000 ++ + /** + * struct xgene_gpio_sb - GPIO-Standby private data structure. + * @gc: memory-mapped GPIO controllers. +- * @irq: Mapping GPIO pins and interrupt number +- * nirq: Number of GPIO pins that supports interrupt ++ * @regs: GPIO register base offset ++ * @irq_domain: GPIO interrupt domain ++ * @irq_start: GPIO pin that start support interrupt ++ * @nirq: Number of GPIO pins that supports interrupt ++ * @parent_irq_base: Start parent HWIRQ + */ + struct xgene_gpio_sb { + struct gpio_chip gc; +- u32 *irq; +- u32 nirq; ++ void __iomem *regs; ++ struct irq_domain *irq_domain; ++ u16 irq_start; ++ u16 nirq; ++ u16 parent_irq_base; + }; + +-static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio, int val) ++#define HWIRQ_TO_GPIO(priv, hwirq) ((hwirq) + (priv)->irq_start) ++#define GPIO_TO_HWIRQ(priv, gpio) ((gpio) - (priv)->irq_start) ++ ++static void xgene_gpio_set_bit(struct gpio_chip *gc, ++ void __iomem *reg, u32 gpio, int val) + { + u32 data; + +@@ -63,23 +82,170 @@ static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio + gc->write_reg(reg, data); + } + +-static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio) ++static int xgene_gpio_sb_irq_set_type(struct irq_data *d, unsigned int type) ++{ ++ struct xgene_gpio_sb *priv = irq_data_get_irq_chip_data(d); ++ int gpio = HWIRQ_TO_GPIO(priv, d->hwirq); ++ int lvl_type = GPIO_INT_LEVEL_H; ++ ++ switch (type & IRQ_TYPE_SENSE_MASK) { ++ case IRQ_TYPE_EDGE_RISING: ++ case IRQ_TYPE_LEVEL_HIGH: ++ lvl_type = GPIO_INT_LEVEL_H; ++ break; ++ case IRQ_TYPE_EDGE_FALLING: ++ case IRQ_TYPE_LEVEL_LOW: ++ lvl_type = GPIO_INT_LEVEL_L; ++ break; ++ default: ++ break; ++ } ++ ++ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO, ++ gpio * 2, 1); ++ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_INT_LVL, ++ d->hwirq, lvl_type); ++ ++ /* Propagate IRQ type setting to parent */ ++ if (type & IRQ_TYPE_EDGE_BOTH) ++ return irq_chip_set_type_parent(d, IRQ_TYPE_EDGE_RISING); ++ else ++ return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH); ++} ++ ++static struct irq_chip xgene_gpio_sb_irq_chip = { ++ .name = "sbgpio", ++ .irq_eoi = irq_chip_eoi_parent, ++ .irq_mask = irq_chip_mask_parent, ++ .irq_unmask = irq_chip_unmask_parent, ++ .irq_set_type = xgene_gpio_sb_irq_set_type, ++}; ++ ++static int xgene_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio) + { + struct xgene_gpio_sb *priv = gpiochip_get_data(gc); ++ struct irq_fwspec fwspec; ++ ++ if ((gpio < priv->irq_start) || ++ (gpio > HWIRQ_TO_GPIO(priv, priv->nirq))) ++ return -ENXIO; ++ ++ if (gc->parent->of_node) ++ fwspec.fwnode = of_node_to_fwnode(gc->parent->of_node); ++ else ++ fwspec.fwnode = gc->parent->fwnode; ++ fwspec.param_count = 2; ++ fwspec.param[0] = GPIO_TO_HWIRQ(priv, gpio); ++ fwspec.param[1] = IRQ_TYPE_NONE; ++ return irq_create_fwspec_mapping(&fwspec); ++} ++ ++static void xgene_gpio_sb_domain_activate(struct irq_domain *d, ++ struct irq_data *irq_data) ++{ ++ struct xgene_gpio_sb *priv = d->host_data; ++ u32 gpio = HWIRQ_TO_GPIO(priv, irq_data->hwirq); ++ ++ if (gpiochip_lock_as_irq(&priv->gc, gpio)) { ++ dev_err(priv->gc.parent, ++ "Unable to configure XGene GPIO standby pin %d as IRQ\n", ++ gpio); ++ return; ++ } ++ ++ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO, ++ gpio * 2, 1); ++} ++ ++static void xgene_gpio_sb_domain_deactivate(struct irq_domain *d, ++ struct irq_data *irq_data) ++{ ++ struct xgene_gpio_sb *priv = d->host_data; ++ u32 gpio = HWIRQ_TO_GPIO(priv, irq_data->hwirq); ++ ++ gpiochip_unlock_as_irq(&priv->gc, gpio); ++ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO, ++ gpio * 2, 0); ++} ++ ++static int xgene_gpio_sb_domain_translate(struct irq_domain *d, ++ struct irq_fwspec *fwspec, ++ unsigned long *hwirq, ++ unsigned int *type) ++{ ++ struct xgene_gpio_sb *priv = d->host_data; + +- if (priv->irq[gpio]) +- return priv->irq[gpio]; ++ if ((fwspec->param_count != 2) || ++ (fwspec->param[0] >= priv->nirq)) ++ return -EINVAL; ++ *hwirq = fwspec->param[0]; ++ *type = fwspec->param[1]; ++ return 0; ++} ++ ++static int xgene_gpio_sb_domain_alloc(struct irq_domain *domain, ++ unsigned int virq, ++ unsigned int nr_irqs, void *data) ++{ ++ struct irq_fwspec *fwspec = data; ++ struct irq_fwspec parent_fwspec; ++ struct xgene_gpio_sb *priv = domain->host_data; ++ irq_hw_number_t hwirq; ++ unsigned int i; ++ ++ hwirq = fwspec->param[0]; ++ for (i = 0; i < nr_irqs; i++) ++ irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, ++ &xgene_gpio_sb_irq_chip, priv); ++ ++ parent_fwspec.fwnode = domain->parent->fwnode; ++ if (is_of_node(parent_fwspec.fwnode)) { ++ parent_fwspec.param_count = 3; ++ parent_fwspec.param[0] = 0;/* SPI */ ++ /* Skip SGIs and PPIs*/ ++ parent_fwspec.param[1] = hwirq + priv->parent_irq_base - 32; ++ parent_fwspec.param[2] = fwspec->param[1]; ++ } else if (is_fwnode_irqchip(parent_fwspec.fwnode)) { ++ parent_fwspec.param_count = 2; ++ parent_fwspec.param[0] = hwirq + priv->parent_irq_base; ++ parent_fwspec.param[1] = fwspec->param[1]; ++ } else ++ return -EINVAL; ++ ++ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, ++ &parent_fwspec); ++} ++ ++static void xgene_gpio_sb_domain_free(struct irq_domain *domain, ++ unsigned int virq, ++ unsigned int nr_irqs) ++{ ++ struct irq_data *d; ++ unsigned int i; + +- return -ENXIO; ++ for (i = 0; i < nr_irqs; i++) { ++ d = irq_domain_get_irq_data(domain, virq + i); ++ irq_domain_reset_irq_data(d); ++ } + } + ++static const struct irq_domain_ops xgene_gpio_sb_domain_ops = { ++ .translate = xgene_gpio_sb_domain_translate, ++ .alloc = xgene_gpio_sb_domain_alloc, ++ .free = xgene_gpio_sb_domain_free, ++ .activate = xgene_gpio_sb_domain_activate, ++ .deactivate = xgene_gpio_sb_domain_deactivate, ++}; ++ + static int xgene_gpio_sb_probe(struct platform_device *pdev) + { + struct xgene_gpio_sb *priv; +- u32 ret, i; +- u32 default_lines[] = {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D}; ++ u32 ret; + struct resource *res; + void __iomem *regs; ++ struct irq_domain *parent_domain = NULL; ++ struct fwnode_handle *fwnode; ++ u32 val32; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) +@@ -90,6 +256,18 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) + if (IS_ERR(regs)) + return PTR_ERR(regs); + ++ priv->regs = regs; ++ ++ ret = platform_get_irq(pdev, 0); ++ if (ret > 0) { ++ priv->parent_irq_base = irq_get_irq_data(ret)->hwirq; ++ parent_domain = irq_get_irq_data(ret)->domain; ++ } ++ if (!parent_domain) { ++ dev_err(&pdev->dev, "unable to obtain parent domain\n"); ++ return -ENODEV; ++ } ++ + ret = bgpio_init(&priv->gc, &pdev->dev, 4, + regs + MPA_GPIO_IN_ADDR, + regs + MPA_GPIO_OUT_ADDR, NULL, +@@ -97,30 +275,51 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) + if (ret) + return ret; + +- priv->gc.to_irq = apm_gpio_sb_to_irq; +- priv->gc.ngpio = XGENE_MAX_GPIO_DS; ++ priv->gc.to_irq = xgene_gpio_sb_to_irq; + +- priv->nirq = XGENE_MAX_GPIO_DS_IRQ; ++ /* Retrieve start irq pin, use default if property not found */ ++ priv->irq_start = XGENE_DFLT_IRQ_START_PIN; ++ if (!device_property_read_u32(&pdev->dev, ++ XGENE_IRQ_START_PROPERTY, &val32)) ++ priv->irq_start = val32; + +- priv->irq = devm_kzalloc(&pdev->dev, sizeof(u32) * XGENE_MAX_GPIO_DS, +- GFP_KERNEL); +- if (!priv->irq) +- return -ENOMEM; ++ /* Retrieve number irqs, use default if property not found */ ++ priv->nirq = XGENE_DFLT_MAX_NIRQ; ++ if (!device_property_read_u32(&pdev->dev, XGENE_NIRQ_PROPERTY, &val32)) ++ priv->nirq = val32; + +- for (i = 0; i < priv->nirq; i++) { +- priv->irq[default_lines[i]] = platform_get_irq(pdev, i); +- xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_SEL_LO, +- default_lines[i] * 2, 1); +- xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_INT_LVL, i, 1); +- } ++ /* Retrieve number gpio, use default if property not found */ ++ priv->gc.ngpio = XGENE_DFLT_MAX_NGPIO; ++ if (!device_property_read_u32(&pdev->dev, XGENE_NGPIO_PROPERTY, &val32)) ++ priv->gc.ngpio = val32; ++ ++ dev_info(&pdev->dev, "Support %d gpios, %d irqs start from pin %d\n", ++ priv->gc.ngpio, priv->nirq, priv->irq_start); + + platform_set_drvdata(pdev, priv); + +- ret = gpiochip_add_data(&priv->gc, priv); +- if (ret) +- dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n"); ++ if (pdev->dev.of_node) ++ fwnode = of_node_to_fwnode(pdev->dev.of_node); + else +- dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n"); ++ fwnode = pdev->dev.fwnode; ++ ++ priv->irq_domain = irq_domain_create_hierarchy(parent_domain, ++ 0, priv->nirq, fwnode, ++ &xgene_gpio_sb_domain_ops, priv); ++ if (!priv->irq_domain) ++ return -ENODEV; ++ ++ priv->gc.irqdomain = priv->irq_domain; ++ ++ ret = gpiochip_add_data(&priv->gc, priv); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "failed to register X-Gene GPIO Standby driver\n"); ++ irq_domain_remove(priv->irq_domain); ++ return ret; ++ } ++ ++ dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n"); + + if (priv->nirq > 0) { + /* Register interrupt handlers for gpio signaled acpi events */ +@@ -138,6 +337,8 @@ static int xgene_gpio_sb_remove(struct platform_device *pdev) + acpi_gpiochip_free_interrupts(&priv->gc); + } + ++ irq_domain_remove(priv->irq_domain); ++ + gpiochip_remove(&priv->gc); + return 0; + } +-- +1.8.3.1 + diff --git a/SOURCES/1022-genirq-Export-IRQ-functions-for-module-use.patch b/SOURCES/1022-genirq-Export-IRQ-functions-for-module-use.patch new file mode 100644 index 0000000..443022a --- /dev/null +++ b/SOURCES/1022-genirq-Export-IRQ-functions-for-module-use.patch @@ -0,0 +1,110 @@ +From a726c3a7d7841388f2cb232b2d91d0f9cdc90af3 Mon Sep 17 00:00:00 2001 +From: Quan Nguyen qnguyen@apm.com +Date: Thu, 3 Mar 2016 21:56:52 +0700 +Subject: [PATCH 1022/1027] genirq: Export IRQ functions for module use + +Export irq_chip_*_parent(), irq_domain_create_hierarchy(), +irq_domain_set_hwirq_and_chip(), irq_domain_reset_irq_data(), +irq_domain_alloc/free_irqs_parent() + +So gpio drivers can be built as modules. First user: gpio-xgene-sb + +Signed-off-by: Quan Nguyen qnguyen@apm.com +Acked-by: Linus Walleij linus.walleij@linaro.org +Cc: Phong Vo pvo@apm.com +Cc: Marc Zyngier marc.zyngier@arm.com +Cc: patches@apm.com +Cc: Loc Ho lho@apm.com +Cc: Keyur Chudgar kchudgar@apm.com +Cc: Jiang Liu jiang.liu@linux.intel.com +Link: https://lists.01.org/pipermail/kbuild-all/2016-February/017914.html +Link: http://lkml.kernel.org/r/1457017012-10628-1-git-send-email-qnguyen@apm.com +Signed-off-by: Thomas Gleixner tglx@linutronix.de +--- + kernel/irq/chip.c | 4 ++++ + kernel/irq/irqdomain.c | 5 +++++ + 2 files changed, 9 insertions(+) + +diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c +index 5797909..2f9f2b0 100644 +--- a/kernel/irq/chip.c ++++ b/kernel/irq/chip.c +@@ -961,6 +961,7 @@ void irq_chip_mask_parent(struct irq_data *data) + data = data->parent_data; + data->chip->irq_mask(data); + } ++EXPORT_SYMBOL_GPL(irq_chip_mask_parent); + + /** + * irq_chip_unmask_parent - Unmask the parent interrupt +@@ -971,6 +972,7 @@ void irq_chip_unmask_parent(struct irq_data *data) + data = data->parent_data; + data->chip->irq_unmask(data); + } ++EXPORT_SYMBOL_GPL(irq_chip_unmask_parent); + + /** + * irq_chip_eoi_parent - Invoke EOI on the parent interrupt +@@ -981,6 +983,7 @@ void irq_chip_eoi_parent(struct irq_data *data) + data = data->parent_data; + data->chip->irq_eoi(data); + } ++EXPORT_SYMBOL_GPL(irq_chip_eoi_parent); + + /** + * irq_chip_set_affinity_parent - Set affinity on the parent interrupt +@@ -1016,6 +1019,7 @@ int irq_chip_set_type_parent(struct irq_data *data, unsigned int type) + + return -ENOSYS; + } ++EXPORT_SYMBOL_GPL(irq_chip_set_type_parent); + + /** + * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware +diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c +index 4ec3149..5798a43 100644 +--- a/kernel/irq/irqdomain.c ++++ b/kernel/irq/irqdomain.c +@@ -913,6 +913,7 @@ struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, + + return domain; + } ++EXPORT_SYMBOL_GPL(irq_domain_create_hierarchy); + + static void irq_domain_insert_irq(int virq) + { +@@ -1063,6 +1064,7 @@ int irq_domain_set_hwirq_and_chip(struct irq_domain *domain, unsigned int virq, + + return 0; + } ++EXPORT_SYMBOL_GPL(irq_domain_set_hwirq_and_chip); + + /** + * irq_domain_set_info - Set the complete data for a @virq in @domain +@@ -1096,6 +1098,7 @@ void irq_domain_reset_irq_data(struct irq_data *irq_data) + irq_data->chip = &no_irq_chip; + irq_data->chip_data = NULL; + } ++EXPORT_SYMBOL_GPL(irq_domain_reset_irq_data); + + /** + * irq_domain_free_irqs_common - Clear irq_data and free the parent +@@ -1293,6 +1296,7 @@ int irq_domain_alloc_irqs_parent(struct irq_domain *domain, + nr_irqs, arg); + return -ENOSYS; + } ++EXPORT_SYMBOL_GPL(irq_domain_alloc_irqs_parent); + + /** + * irq_domain_free_irqs_parent - Free interrupts from parent domain +@@ -1310,6 +1314,7 @@ void irq_domain_free_irqs_parent(struct irq_domain *domain, + irq_domain_free_irqs_recursive(domain->parent, irq_base, + nr_irqs); + } ++EXPORT_SYMBOL_GPL(irq_domain_free_irqs_parent); + + /** + * irq_domain_activate_irq - Call domain_ops->activate recursively to activate +-- +1.8.3.1 + diff --git a/SPECS/kernel-aarch64.spec b/SPECS/kernel-aarch64.spec index 88a35a6..2034cd0 100644 --- a/SPECS/kernel-aarch64.spec +++ b/SPECS/kernel-aarch64.spec @@ -12,7 +12,7 @@ Summary: The Linux kernel
%define rpmversion 4.5.0 %define pkgrelease 15.el7 -%define centupdate 17.el7 +%define centupdate 18.el7
# allow pkg_release to have configurable %{?dist} tag %define specrelease %%SPECRELEASE%% @@ -345,6 +345,8 @@ Patch1017: 1017-drivers-net-xgene-fix-Coalescing-values-for-v2-hardw.patch Patch1018: 1018-ACPI-PCI-fix-GIC-irq-model-default-PCI-IRQ-polarity.patch Patch1019: 1019-i2c-designware-Implement-support-for-SMBus-block-rea.patch Patch1020: 1020-hwmon-xgene-access-mailbox-as-RAM.patch +Patch1021: 1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch +Patch1022: 1022-genirq-Export-IRQ-functions-for-module-use.patch
# QDF2400 Patches Patch4000: 4000-arm64-Define-Qualcomm-Technologies-ARMv8-CPU.patch @@ -700,6 +702,8 @@ git am %{PATCH1017} git am %{PATCH1018} git am %{PATCH1019} git am %{PATCH1020} +git am %{PATCH1021} +git am %{PATCH1022}
# Apply QDF2400 patches git am %{PATCH4000} @@ -1478,6 +1482,9 @@ fi %kernel_variant_files %{with_debug} kernel-debug debug
%changelog +* Thu Nov 17 2016 Duc Dang dhdang@apm.com [4.5.0-18.el7] +- Integrate upstream patch to add interrupt support for X-Gene Standby GPIO + * Thu Nov 10 2016 Duc Dang dhdang@apm.com [4.5.0-17.el7] - Integrate upstream fix to make X-Gene HWmon access mailbox as RAM and avoid eror when built as module - Integrated posted patch to support SMBus block read/write for Designware I2C
These patches are already upstream (v4.9-rc1). The original series was posted by Ard Biesheuvel: http://www.spinics.net/lists/arm-kernel/msg482982.html
Signed-off-by: Duc Dang dhdang@apm.com --- ...-drivers-to-reserve-boot-services-forever.patch | 112 +++++++++++++++++++++ ...fi-esrt-add-missing-call-to-efi_esrt_init.patch | 48 +++++++++ SOURCES/1025-efi-esrt-Don-t-preformat-name.patch | 46 +++++++++ ...t-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch | 90 +++++++++++++++++ ...e-memremap-not-ioremap-to-access-ESRT-tab.patch | 52 ++++++++++ SPECS/kernel-aarch64.spec | 11 ++ 6 files changed, 359 insertions(+) create mode 100644 SOURCES/1023-efi-Allow-drivers-to-reserve-boot-services-forever.patch create mode 100644 SOURCES/1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch create mode 100644 SOURCES/1025-efi-esrt-Don-t-preformat-name.patch create mode 100644 SOURCES/1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch create mode 100644 SOURCES/1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch
diff --git a/SOURCES/1023-efi-Allow-drivers-to-reserve-boot-services-forever.patch b/SOURCES/1023-efi-Allow-drivers-to-reserve-boot-services-forever.patch new file mode 100644 index 0000000..44de0df --- /dev/null +++ b/SOURCES/1023-efi-Allow-drivers-to-reserve-boot-services-forever.patch @@ -0,0 +1,112 @@ +From e8f60371bfbc8c5917b445dc2c5278065f21334d Mon Sep 17 00:00:00 2001 +From: Matt Fleming matt@codeblueprint.co.uk +Date: Wed, 16 Nov 2016 17:09:50 -0600 +Subject: [PATCH 1023/1027] efi: Allow drivers to reserve boot services forever + +Today, it is not possible for drivers to reserve EFI boot services for +access after efi_free_boot_services() has been called on x86. For +ARM/arm64 it can be done simply by calling memblock_reserve(). + +Having this ability for all three architectures is desirable for a +couple of reasons, + + 1) It saves drivers copying data out of those regions + 2) kexec reboot can now make use of things like ESRT + +Instead of using the standard memblock_reserve() which is insufficient +to reserve the region on x86 (see efi_reserve_boot_services()), a new +API is introduced in this patch; efi_mem_reserve(). + +efi.memmap now always represents which EFI memory regions are +available. On x86 the EFI boot services regions that have not been +reserved via efi_mem_reserve() will be removed from efi.memmap during +efi_free_boot_services(). + +This has implications for kexec, since it is not possible for a newly +kexec'd kernel to access the same boot services regions that the +initial boot kernel had access to unless they are reserved by every +kexec kernel in the chain. + +Tested-by: Dave Young dyoung@redhat.com [kexec/kdump] +Tested-by: Ard Biesheuvel ard.biesheuvel@linaro.org [arm] +Acked-by: Ard Biesheuvel ard.biesheuvel@linaro.org +Cc: Leif Lindholm leif.lindholm@linaro.org +Cc: Peter Jones pjones@redhat.com +Cc: Borislav Petkov bp@alien8.de +Cc: Mark Rutland mark.rutland@arm.com +Signed-off-by: Matt Fleming matt@codeblueprint.co.uk + +[Apply from upstream commit 816e76129ed5fadd28e526c43397c79775194b5c +for CentOS 7.3 AltArch, drop the changes for x86 platforms in +arch/x86/platform/efi/quirks.c] +Signed-off-by: Huy Duong hduong@apm.com +Signed-off-by: Duc Dang dhdang@apm.com +--- + drivers/firmware/efi/efi.c | 31 ++++++++++++++++++++++++++++++- + include/linux/efi.h | 1 + + 2 files changed, 31 insertions(+), 1 deletion(-) + +diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c +index 2cd37da..5f3c096 100644 +--- a/drivers/firmware/efi/efi.c ++++ b/drivers/firmware/efi/efi.c +@@ -24,7 +24,7 @@ + #include <linux/of_fdt.h> + #include <linux/io.h> + #include <linux/platform_device.h> +- ++#include <linux/memblock.h> + #include <asm/early_ioremap.h> + + struct efi __read_mostly efi = { +@@ -358,6 +358,35 @@ void __iomem *efi_lookup_mapped_addr(u64 phys_addr) + return NULL; + } + ++void __init __weak efi_arch_mem_reserve(phys_addr_t addr, u64 size) {} ++ ++/** ++ * efi_mem_reserve - Reserve an EFI memory region ++ * @addr: Physical address to reserve ++ * @size: Size of reservation ++ * ++ * Mark a region as reserved from general kernel allocation and ++ * prevent it being released by efi_free_boot_services(). ++ * ++ * This function should be called drivers once they've parsed EFI ++ * configuration tables to figure out where their data lives, e.g. ++ * efi_esrt_init(). ++ */ ++void __init efi_mem_reserve(phys_addr_t addr, u64 size) ++{ ++ if (!memblock_is_region_reserved(addr, size)) ++ memblock_reserve(addr, size); ++ ++ /* ++ * Some architectures (x86) reserve all boot services ranges ++ * until efi_free_boot_services() because of buggy firmware ++ * implementations. This means the above memblock_reserve() is ++ * superfluous on x86 and instead what it needs to do is ++ * ensure the @start, @size is not freed. ++ */ ++ efi_arch_mem_reserve(addr, size); ++} ++ + static __initdata efi_config_table_type_t common_tables[] = { + {ACPI_20_TABLE_GUID, "ACPI 2.0", &efi.acpi20}, + {ACPI_TABLE_GUID, "ACPI", &efi.acpi}, +diff --git a/include/linux/efi.h b/include/linux/efi.h +index 47be3ad..6cf8403 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -911,6 +911,7 @@ extern u64 efi_mem_attribute (unsigned long phys_addr, unsigned long size); + extern int __init efi_uart_console_only (void); + extern u64 efi_mem_desc_end(efi_memory_desc_t *md); + extern int efi_mem_desc_lookup(u64 phys_addr, efi_memory_desc_t *out_md); ++extern void efi_mem_reserve(phys_addr_t addr, u64 size); + extern void efi_initialize_iomem_resources(struct resource *code_resource, + struct resource *data_resource, struct resource *bss_resource); + extern void efi_get_time(struct timespec *now); +-- +1.8.3.1 + diff --git a/SOURCES/1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch b/SOURCES/1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch new file mode 100644 index 0000000..4944833 --- /dev/null +++ b/SOURCES/1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch @@ -0,0 +1,48 @@ +From 1e6d164dc465e45ac59c1371ac57d649094d663f Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel ard.biesheuvel@linaro.org +Date: Wed, 16 Nov 2016 17:25:54 -0600 +Subject: [PATCH 1024/1027] arm64/efi: esrt: add missing call to + efi_esrt_init() + +ESRT support is built by default for all architectures that define +CONFIG_EFI. However, this support was not wired up yet for ARM/arm64, +since efi_esrt_init() was never called. So add the missing call. + +Since efi_esrt_init() uses efi_mem_desc_lookup(), which in turn relies +on efi.memmap having been assigned and populated completetely, add the +missing assignments of efi.memmap and efi.memmap->nr_map. + +Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org + +[Apply for CentOS 7.3 AltArch. Original patch is posted at +http://www.spinics.net/lists/arm-kernel/msg482984.html, +Matt Fleming queued an updated verison of this patch +for v4.9 (https://patchwork.kernel.org/patch/9223967/)] +Signed-off-by: Huy Duong hduong@apm.com +Signed-off-by: Duc Dang dhdang@apm.com +--- + drivers/firmware/efi/arm-init.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/firmware/efi/arm-init.c b/drivers/firmware/efi/arm-init.c +index b21dbb5..68b176c 100644 +--- a/drivers/firmware/efi/arm-init.c ++++ b/drivers/firmware/efi/arm-init.c +@@ -205,11 +205,14 @@ void __init efi_init(void) + memmap.map_end = memmap.map + params.mmap_size; + memmap.desc_size = params.desc_size; + memmap.desc_version = params.desc_ver; ++ memmap.nr_map = params.mmap_size / params.desc_size; ++ efi.memmap = &memmap; + + if (uefi_init() < 0) + return; + + reserve_regions(); ++ efi_esrt_init(); + early_memunmap(memmap.map, params.mmap_size); + memblock_mark_nomap(params.mmap & PAGE_MASK, + PAGE_ALIGN(params.mmap_size + +-- +1.8.3.1 + diff --git a/SOURCES/1025-efi-esrt-Don-t-preformat-name.patch b/SOURCES/1025-efi-esrt-Don-t-preformat-name.patch new file mode 100644 index 0000000..4a1b519 --- /dev/null +++ b/SOURCES/1025-efi-esrt-Don-t-preformat-name.patch @@ -0,0 +1,46 @@ +From 60de706977433c7e2a2c677a292747dfa258840e Mon Sep 17 00:00:00 2001 +From: Rasmus Villemoes linux@rasmusvillemoes.dk +Date: Fri, 20 Nov 2015 11:30:17 +0100 +Subject: [PATCH 1025/1027] efi/esrt: Don't preformat name + +kobject_init_and_add takes a format string+args, so there's no reason +to do this formatting in advance. + +Signed-off-by: Rasmus Villemoes linux@rasmusvillemoes.dk +Cc: Peter Jones pjones@redhat.com +Signed-off-by: Matt Fleming matt@codeblueprint.co.uk +--- + drivers/firmware/efi/esrt.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/drivers/firmware/efi/esrt.c b/drivers/firmware/efi/esrt.c +index 22c5285..75feb3f 100644 +--- a/drivers/firmware/efi/esrt.c ++++ b/drivers/firmware/efi/esrt.c +@@ -167,14 +167,11 @@ static struct kset *esrt_kset; + static int esre_create_sysfs_entry(void *esre, int entry_num) + { + struct esre_entry *entry; +- char name[20]; + + entry = kzalloc(sizeof(*entry), GFP_KERNEL); + if (!entry) + return -ENOMEM; + +- sprintf(name, "entry%d", entry_num); +- + entry->kobj.kset = esrt_kset; + + if (esrt->fw_resource_version == 1) { +@@ -182,7 +179,7 @@ static int esre_create_sysfs_entry(void *esre, int entry_num) + + entry->esre.esre1 = esre; + rc = kobject_init_and_add(&entry->kobj, &esre1_ktype, NULL, +- "%s", name); ++ "entry%d", entry_num); + if (rc) { + kfree(entry); + return rc; +-- +1.8.3.1 + diff --git a/SOURCES/1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch b/SOURCES/1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch new file mode 100644 index 0000000..6d7d6c1 --- /dev/null +++ b/SOURCES/1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch @@ -0,0 +1,90 @@ +From 44acdab31a74c7ec482f4b0f332fe6c4c21d1dc6 Mon Sep 17 00:00:00 2001 +From: Matt Fleming matt@codeblueprint.co.uk +Date: Tue, 1 Mar 2016 23:08:03 +0000 +Subject: [PATCH 1026/1027] efi/esrt: Use efi_mem_reserve() and avoid a + kmalloc() + +We can use the new efi_mem_reserve() API to mark the ESRT table as +reserved forever and save ourselves the trouble of copying the data +out into a kmalloc buffer. + +The added advantage is that now the ESRT driver will work across +kexec reboot. + +Tested-by: Dave Young dyoung@redhat.com [kexec/kdump] +Tested-by: Ard Biesheuvel ard.biesheuvel@linaro.org [arm] +Acked-by: Ard Biesheuvel ard.biesheuvel@linaro.org +Cc: Leif Lindholm leif.lindholm@linaro.org +Cc: Peter Jones pjones@redhat.com +Cc: Borislav Petkov bp@alien8.de +Cc: Mark Rutland mark.rutland@arm.com +Signed-off-by: Matt Fleming matt@codeblueprint.co.uk +--- + drivers/firmware/efi/esrt.c | 20 ++++---------------- + 1 file changed, 4 insertions(+), 16 deletions(-) + +diff --git a/drivers/firmware/efi/esrt.c b/drivers/firmware/efi/esrt.c +index 75feb3f..b93cd11 100644 +--- a/drivers/firmware/efi/esrt.c ++++ b/drivers/firmware/efi/esrt.c +@@ -235,7 +235,7 @@ static struct attribute_group esrt_attr_group = { + }; + + /* +- * remap the table, copy it to kmalloced pages, and unmap it. ++ * remap the table, validate it, mark it reserved and unmap it. + */ + void __init efi_esrt_init(void) + { +@@ -335,7 +335,7 @@ void __init efi_esrt_init(void) + + end = esrt_data + size; + pr_info("Reserving ESRT space from %pa to %pa.\n", &esrt_data, &end); +- memblock_reserve(esrt_data, esrt_data_size); ++ efi_mem_reserve(esrt_data, esrt_data_size); + + pr_debug("esrt-init: loaded.\n"); + err_memunmap: +@@ -382,28 +382,18 @@ static void cleanup_entry_list(void) + static int __init esrt_sysfs_init(void) + { + int error; +- struct efi_system_resource_table __iomem *ioesrt; + + pr_debug("esrt-sysfs: loading.\n"); + if (!esrt_data || !esrt_data_size) + return -ENOSYS; + +- ioesrt = ioremap(esrt_data, esrt_data_size); +- if (!ioesrt) { ++ esrt = ioremap(esrt_data, esrt_data_size); ++ if (!esrt) { + pr_err("ioremap(%pa, %zu) failed.\n", &esrt_data, + esrt_data_size); + return -ENOMEM; + } + +- esrt = kmalloc(esrt_data_size, GFP_KERNEL); +- if (!esrt) { +- pr_err("kmalloc failed. (wanted %zu bytes)\n", esrt_data_size); +- iounmap(ioesrt); +- return -ENOMEM; +- } +- +- memcpy_fromio(esrt, ioesrt, esrt_data_size); +- + esrt_kobj = kobject_create_and_add("esrt", efi_kobj); + if (!esrt_kobj) { + pr_err("Firmware table registration failed.\n"); +@@ -429,8 +419,6 @@ static int __init esrt_sysfs_init(void) + if (error) + goto err_cleanup_list; + +- memblock_remove(esrt_data, esrt_data_size); +- + pr_debug("esrt-sysfs: loaded.\n"); + + return 0; +-- +1.8.3.1 + diff --git a/SOURCES/1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch b/SOURCES/1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch new file mode 100644 index 0000000..11f1fca --- /dev/null +++ b/SOURCES/1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch @@ -0,0 +1,52 @@ +From 3dba40136c1ab16d48012dbd00e5f12681f13553 Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel ard.biesheuvel@linaro.org +Date: Mon, 11 Jul 2016 21:00:45 +0200 +Subject: [PATCH 1027/1027] efi/esrt: Use memremap not ioremap to access ESRT + table in memory + +On ARM and arm64, ioremap() and memremap() are not interchangeable like +on x86, and the use of ioremap() on ordinary RAM is typically flagged +as an error if the memory region being mapped is also covered by the +linear mapping, since that would lead to aliases with conflicting +cacheability attributes. + +Since what we are dealing with is not an I/O region with side effects, +using ioremap() here is arguably incorrect anyway, so let's replace +it with memremap() instead. + +Acked-by: Peter Jones pjones@redhat.com +Signed-off-by: Ard Biesheuvel ard.biesheuvel@linaro.org +Cc: Leif Lindholm leif.lindholm@linaro.org +Cc: Mark Rutland mark.rutland@arm.com +Signed-off-by: Matt Fleming matt@codeblueprint.co.uk +--- + drivers/firmware/efi/esrt.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/firmware/efi/esrt.c b/drivers/firmware/efi/esrt.c +index b93cd11..1491407 100644 +--- a/drivers/firmware/efi/esrt.c ++++ b/drivers/firmware/efi/esrt.c +@@ -16,6 +16,7 @@ + #include <linux/device.h> + #include <linux/efi.h> + #include <linux/init.h> ++#include <linux/io.h> + #include <linux/kernel.h> + #include <linux/kobject.h> + #include <linux/list.h> +@@ -387,9 +388,9 @@ static int __init esrt_sysfs_init(void) + if (!esrt_data || !esrt_data_size) + return -ENOSYS; + +- esrt = ioremap(esrt_data, esrt_data_size); ++ esrt = memremap(esrt_data, esrt_data_size, MEMREMAP_WB); + if (!esrt) { +- pr_err("ioremap(%pa, %zu) failed.\n", &esrt_data, ++ pr_err("memremap(%pa, %zu) failed.\n", &esrt_data, + esrt_data_size); + return -ENOMEM; + } +-- +1.8.3.1 + diff --git a/SPECS/kernel-aarch64.spec b/SPECS/kernel-aarch64.spec index 2034cd0..6e7950b 100644 --- a/SPECS/kernel-aarch64.spec +++ b/SPECS/kernel-aarch64.spec @@ -347,6 +347,11 @@ Patch1019: 1019-i2c-designware-Implement-support-for-SMBus-block-rea.patch Patch1020: 1020-hwmon-xgene-access-mailbox-as-RAM.patch Patch1021: 1021-gpio-xgene-Enable-X-Gene-standby-GPIO-as-interrupt-c.patch Patch1022: 1022-genirq-Export-IRQ-functions-for-module-use.patch +Patch1023: 1023-efi-Allow-drivers-to-reserve-boot-services-forever.patch +Patch1024: 1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch +Patch1025: 1025-efi-esrt-Don-t-preformat-name.patch +Patch1026: 1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch +Patch1027: 1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch
# QDF2400 Patches Patch4000: 4000-arm64-Define-Qualcomm-Technologies-ARMv8-CPU.patch @@ -704,6 +709,11 @@ git am %{PATCH1019} git am %{PATCH1020} git am %{PATCH1021} git am %{PATCH1022} +git am %{PATCH1023} +git am %{PATCH1024} +git am %{PATCH1025} +git am %{PATCH1026} +git am %{PATCH1027}
# Apply QDF2400 patches git am %{PATCH4000} @@ -1483,6 +1493,7 @@ fi
%changelog * Thu Nov 17 2016 Duc Dang dhdang@apm.com [4.5.0-18.el7] +- Backport upstream patches to support fwupdate - Integrate upstream patch to add interrupt support for X-Gene Standby GPIO
* Thu Nov 10 2016 Duc Dang dhdang@apm.com [4.5.0-17.el7]
The fix was already reviewed by Prashant and accepted by Rafael: https://git.kernel.org/cgit/linux/kernel/git/rafael/linux-pm.git/commit/?h=b...
Signed-off-by: Duc Dang dhdang@apm.com --- ...-Fix-lockdep-warning-when-request-PCC-cha.patch | 120 +++++++++++++++++++++ SPECS/kernel-aarch64.spec | 3 + 2 files changed, 123 insertions(+) create mode 100644 SOURCES/1028-mailbox-PCC-Fix-lockdep-warning-when-request-PCC-cha.patch
diff --git a/SOURCES/1028-mailbox-PCC-Fix-lockdep-warning-when-request-PCC-cha.patch b/SOURCES/1028-mailbox-PCC-Fix-lockdep-warning-when-request-PCC-cha.patch new file mode 100644 index 0000000..9276390 --- /dev/null +++ b/SOURCES/1028-mailbox-PCC-Fix-lockdep-warning-when-request-PCC-cha.patch @@ -0,0 +1,120 @@ +From ba77f6beff28859afd0b57282012183684647d8a Mon Sep 17 00:00:00 2001 +From: Hoan Tran hotran@apm.com +Date: Mon, 14 Nov 2016 11:19:02 -0800 +Subject: [PATCH] mailbox: PCC: Fix lockdep warning when request PCC channel + +This patch fixes the lockdep warning below + +DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags)) +------------[ cut here ]------------ +WARNING: CPU: 1 PID: 1 at linux-next/kernel/locking/lockdep.c:2876 lockdep_trace_alloc+0xe0/0xf0 + Modules linked in: + + CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.8.0-11756-g86c5152 #46 +... + Call trace: + Exception stack(0xffff8007da837890 to 0xffff8007da8379c0) + 7880: ffff8007da834000 0001000000000000 + 78a0: ffff8007da837a70 ffff0000081111a0 00000000600000c5 000000000000003d + 78c0: 9374bc6a7f3c7832 0000000000381878 ffff000009db7ab8 000000000000002f + 78e0: ffff00000811aabc ffff000008be2548 ffff8007da837990 ffff00000811adf8 + 7900: ffff8007da834000 00000000024080c0 00000000000000c0 ffff000009021000 + 7920: 0000000000000000 0000000000000000 ffff000008c8f7c8 ffff8007da579810 + 7940: 000000000000002f ffff8007da858000 0000000000000000 0000000000000001 + 7960: 0000000000000001 0000000000000000 ffff00000811a468 0000000000000002 + 7980: 656c62617369645f 0000000000038187 00000000000000ee ffff8007da837850 + 79a0: ffff000009db50c0 ffff000009db569d 0000000000000006 ffff000089db568f + [<ffff0000081111a0>] lockdep_trace_alloc+0xe0/0xf0 + [<ffff0000081f4950>] __kmalloc_track_caller+0x50/0x250 + [<ffff00000857c088>] devres_alloc_node+0x28/0x60 + [<ffff0000081220e0>] devm_request_threaded_irq+0x50/0xe0 + [<ffff0000087e6220>] pcc_mbox_request_channel+0x110/0x170 + [<ffff0000084b2660>] acpi_cppc_processor_probe+0x264/0x414 + [<ffff0000084ae9f4>] __acpi_processor_start+0x28/0xa0 + [<ffff0000084aeab0>] acpi_processor_start+0x44/0x54 + [<ffff00000857897c>] driver_probe_device+0x1fc/0x2b0 + [<ffff000008578ae4>] __driver_attach+0xb4/0xc0 + [<ffff00000857683c>] bus_for_each_dev+0x5c/0xa0 + [<ffff000008578110>] driver_attach+0x20/0x30 + [<ffff000008577c20>] bus_add_driver+0x110/0x230 + [<ffff000008579320>] driver_register+0x60/0x100 + [<ffff000008d478b8>] acpi_processor_driver_init+0x2c/0xb0 + [<ffff000008083168>] do_one_initcall+0x38/0x130 + [<ffff000008d20d6c>] kernel_init_freeable+0x210/0x2b4 + [<ffff000008945d90>] kernel_init+0x10/0x110 + [<ffff000008082e80>] ret_from_fork+0x10/0x50 + +It's because the spinlock inside pcc_mbox_request_channel() is +kept too long. This patch releases spinlock before request_irq() +and free_irq() to fix this issue as spinlock is only needed to +protect the channel data. + +Signed-off-by: Hoan Tran hotran@apm.com +Reviewed-by: Prashanth Prakash pprakash@codeaurora.org +Signed-off-by: Rafael J. Wysocki rafael.j.wysocki@intel.com +--- + drivers/mailbox/pcc.c | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +diff --git a/drivers/mailbox/pcc.c b/drivers/mailbox/pcc.c +index c98bd94..fb594ed 100644 +--- a/drivers/mailbox/pcc.c ++++ b/drivers/mailbox/pcc.c +@@ -65,6 +65,7 @@ + #include <linux/mailbox_controller.h> + #include <linux/mailbox_client.h> + #include <linux/io-64-nonatomic-lo-hi.h> ++#include <acpi/pcc.h> + + #include "mailbox.h" + +@@ -267,6 +268,8 @@ struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, + if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone) + chan->txdone_method |= TXDONE_BY_ACK; + ++ spin_unlock_irqrestore(&chan->lock, flags); ++ + if (pcc_doorbell_irq[subspace_id] > 0) { + int rc; + +@@ -275,12 +278,11 @@ struct mbox_chan *pcc_mbox_request_channel(struct mbox_client *cl, + if (unlikely(rc)) { + dev_err(dev, "failed to register PCC interrupt %d\n", + pcc_doorbell_irq[subspace_id]); ++ pcc_mbox_free_channel(chan); + chan = ERR_PTR(rc); + } + } + +- spin_unlock_irqrestore(&chan->lock, flags); +- + return chan; + } + EXPORT_SYMBOL_GPL(pcc_mbox_request_channel); +@@ -304,20 +306,19 @@ void pcc_mbox_free_channel(struct mbox_chan *chan) + return; + } + ++ if (pcc_doorbell_irq[id] > 0) ++ devm_free_irq(chan->mbox->dev, pcc_doorbell_irq[id], chan); ++ + spin_lock_irqsave(&chan->lock, flags); + chan->cl = NULL; + chan->active_req = NULL; + if (chan->txdone_method == (TXDONE_BY_POLL | TXDONE_BY_ACK)) + chan->txdone_method = TXDONE_BY_POLL; + +- if (pcc_doorbell_irq[id] > 0) +- devm_free_irq(chan->mbox->dev, pcc_doorbell_irq[id], chan); +- + spin_unlock_irqrestore(&chan->lock, flags); + } + EXPORT_SYMBOL_GPL(pcc_mbox_free_channel); + +- + /** + * pcc_send_data - Called from Mailbox Controller code. Used + * here only to ring the channel doorbell. The PCC client +-- +1.8.3.1 + diff --git a/SPECS/kernel-aarch64.spec b/SPECS/kernel-aarch64.spec index 6e7950b..b9596d5 100644 --- a/SPECS/kernel-aarch64.spec +++ b/SPECS/kernel-aarch64.spec @@ -352,6 +352,7 @@ Patch1024: 1024-arm64-efi-esrt-add-missing-call-to-efi_esrt_init.patch Patch1025: 1025-efi-esrt-Don-t-preformat-name.patch Patch1026: 1026-efi-esrt-Use-efi_mem_reserve-and-avoid-a-kmalloc.patch Patch1027: 1027-efi-esrt-Use-memremap-not-ioremap-to-access-ESRT-tab.patch +Patch1028: 1028-mailbox-PCC-Fix-lockdep-warning-when-request-PCC-cha.patch
# QDF2400 Patches Patch4000: 4000-arm64-Define-Qualcomm-Technologies-ARMv8-CPU.patch @@ -714,6 +715,7 @@ git am %{PATCH1024} git am %{PATCH1025} git am %{PATCH1026} git am %{PATCH1027} +git am %{PATCH1028}
# Apply QDF2400 patches git am %{PATCH4000} @@ -1493,6 +1495,7 @@ fi
%changelog * Thu Nov 17 2016 Duc Dang dhdang@apm.com [4.5.0-18.el7] +- Integrate upstream fix for a lockdep warning when request PCC channel - Backport upstream patches to support fwupdate - Integrate upstream patch to add interrupt support for X-Gene Standby GPIO
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Duc Dang