5 Jun
2011
5 Jun
'11
7:38 p.m.
On 06/05/2011 01:48 PM, Morten Torstensen wrote:
On 03.06.2011 17:02, Karanbir Singh wrote:
there is actually an ia64 build that runs in parallel with the x86_64 C5 stream.... And there has been a fair bit of work done on Sparc for c6. Lets work on getting a plan together for these 'extra' archs using the i586 target as a model - we can then expand that to include other arch's as well.
Anyone tinkering with C6 for Power?
Yes, Fabian and I have been looking at that - semi blocker is the need for a power7+ machine
- KB